06980552 is referenced by 117 patents and cites 5 patents.

A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in a multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet's routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Using bandwidth management techniques, each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path includes a buffer/queuing circuit similar to that used in the receive path and can include another pipelined switch. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus, congestion avoidance, and bandwidth management hardware.

Title
Pipelined packet switching and queuing architecture
Application Number
10/219460
Publication Number
6980552 (B1)
Application Date
August 15, 2002
Publication Date
December 27, 2005
Inventor
Eyal Oren
Tel Aviv
IL
Michael Laor
Zichron Yaakov
IL
Garry P Epps
Sunnyvale
CA, US
David Belz
Raanana
IL
Agent
Marc R Ascolese
Campbell Stephenson Ascolese
Assignee
Cisco Technology
CA, US
IPC
H04L 012/56
H04L 012/28
View Original Source