06934951 is referenced by 35 patents and cites 186 patents.

A system and method for employing multiple hardware contexts and programming engines in a functional pipeline partitioned to facilitate high performance data processing. The system and method includes a parallel processor that assigns system functions for processing data including programming engines that support multiple contexts arranged to provide a functional pipeline by a functional pipeline control unit that passes functional data among the programming engines.

Title
Parallel processor with functional pipeline providing programming engines by supporting multiple contexts and critical section
Application Number
10/53172
Publication Number
6934951 (B2)
Application Date
January 17, 2002
Publication Date
August 23, 2005
Inventor
Myles J Wilde
Charlestown
MA, US
Debra Bernstein
Sudbury
MA, US
Mark B Rosenbluth
Uxbridge
MA, US
Gilbert Wolrich
Framingham
MA, US
Matthew J Adiletta
Worcester
MA, US
Hugh M Wilkinson III
Newton
MA, US
Agent
Fish & Richardson P C
Assignee
Intel Corporation
CA, US
IPC
G06F 009/46
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