06931354 is referenced by 94 patents and cites 4 patents.

Performance events are counted for a computing system. This includes designating a first processor counter as a low-order counter for counting a certain performance event encountered by the processor and associating with the first counter a second counter as a high-order counter. The first counter is incremented responsive to detecting the performance event for a first processing thread. Responsive to a second thread, an accumulator in system memory for the first thread and first and second counters is updated. Responsive to the first thread becoming active, values of the first and second counters are loaded from the accumulator. Responsive to a user call to read and return a combined value, a first instance of the second counter is read, then the first counter is read and a second instance of the second counter is read before returning the combined value.

Title
Method, apparatus and computer program product for efficient, large counts of per thread performance events
Application Number
10/713742
Publication Number
6931354 (B2)
Application Date
November 13, 2003
Publication Date
August 16, 2005
Inventor
Robert John Urquhart
Austin
TX, US
Frank Eliot Levine
Austin
TX, US
Scott Thomas Jones
Austin
TX, US
Agent
Anthony V S England
Diana Roberts Gerhardi
Assignee
International Business Machines Corporation
NY, US
IPC
G21C 017/00
G06F 015/00
G06F 011/30
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