06920532 is referenced by 9 patents and cites 42 patents.

Cache coherence directory eviction mechanisms are described for use in computer systems having a plurality of multiprocessor clusters. Interaction among the clusters is facilitated by a cache coherence controller in each cluster. A cache coherence directory is associated with each cache coherence controller identifying memory lines associated with the local cluster which are cached in remote clusters. The cache coherence controller is operable to initiate eviction of an entry in its directory corresponding to a modified copy of a memory line by sending a request to merge an empty data field with the modified copy of the memory line to a corresponding memory controller.

Title
Cache coherence directory eviction mechanisms for modified copies of memory lines in multiprocessor systems
Application Number
10/289521
Publication Number
6920532 (B2)
Application Date
November 5, 2002
Publication Date
July 19, 2005
Inventor
Sridhar K Valluru
Austin
TX, US
Rajesh Kota
Austin
TX, US
David Brian Glasco
Austin
TX, US
Agent
Beyer Weaver & Thomas
Assignee
Newisys
TX, US
IPC
G06F 013/00
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