06870768 is referenced by 116 patents and cites 25 patents.

Techniques of reducing erroneous readings of the apparent charge levels stored in a number of rows of memory cells on account of capacitive coupling between the cells. All pages of a first row are programmed with a first pass, followed by programming all pages of a second adjacent row with a first pass, after which the first row is programmed with a second pass, and then all pages of a third row are programmed with a first pass, followed by returning to program the second row with a second pass, and so on, in a back-and-forth manner across the rows of an array. This minimizes the effect on the apparent charge stored on rows of memory cells that can occur by later writing data into adjacent rows of memory cells.

Title
Techniques for reducing effects of coupling between storage elements of adjacent rows of memory cells
Application Number
10/923320
Publication Number
6870768 (B2)
Application Date
August 20, 2004
Publication Date
March 22, 2005
Inventor
Yupin Fong
Fremont
CA, US
Jian Chen
San Jose
CA, US
Yan Li
Milpitas
CA, US
Khandker N Quader
Sunnyvale
CA, US
Raul Adrian Cernea
Santa Clara
CA, US
Agent
Parsons Hsue & de Runtz
Assignee
SanDisk Corporation
CA, US
IPC
G11C 016/04
View Original Source