06840777 is referenced by 52 patents and cites 42 patents.

To decrease the thickness, or stack height, of an electronics package, the package includes a solderless compression connector between an integrated circuit (IC) package and a substrate such as a printed circuit board (PCB). In one embodiment, the IC package is mounted on the substrate using a land grid array arrangement. Corresponding lands on the IC package and substrate are coupled using a solderless compression connector. The compression connector includes a plurality of electrically conductive elements, such as compressible button contacts, and an apertured support that aligns the button contacts with corresponding lands on the IC package and substrate. In another embodiment, the connector includes electrically conductive pins embedded in a thin plastic sheet. In a further embodiment, the connector includes a microcrystalline film having electrically conductive crystals. In a further embodiment, the compression connector is used within an IC package to couple an IC to an IC package substrate. Methods of fabrication, as well as application of the package to an electronic assembly, an electronic system, and a data processing system, are also described.

Title
Solderless electronics packaging
Application Number
9/726629
Publication Number
6840777 (B2)
Application Date
November 30, 2000
Publication Date
January 11, 2005
Inventor
Paul H Wermer
San Francisco
CA, US
Ajit V Sathe
Chandler
AZ, US
Agent
Schwegman Lundberg Woessner & Kluth P A
Assignee
Intel Corporation
CA, US
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