06812552 is referenced by 182 patents.

A method of making a lead frame and a partially patterned lead frame package with near-chip scale packaging (CSP) lead-counts is accomplished by performing a major portion of the manufacturing process steps with a partially patterned strip of metal formed into a web-like lead frame on one side, so that the web-like lead frame, which is solid and flat on the other side is also rigid mechanically and robust thermally to perform without distortion or deformation during the chip-attach and wire bond processes, both at the chip level and the package level. The bottom side of the metal lead frame is patterned to isolate the chip-pad and the wire bond contacts only after the front side, including the chip and wires, is encapsulated. The resultant package being electrically isolated enables strip testing and reliable singulation without having to cut into any additional metal.

Title
Partially patterned lead frames and methods of making and using the same in semiconductor packaging
Application Number
10/134882
Publication Number
6812552 (B2)
Application Date
April 29, 2002
Publication Date
November 2, 2004
Inventor
Romarico Santos San Antonio
Batam Island
US
Shafidul Islam
Plano
TX, US
Agent
White & Case
US
Assignee
Advanced Interconnect Technologies
US
IPC
H01L 23/495
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