06717233 is referenced by 16 patents.

A method for fabricating resistors within a semiconductor integrated circuit device is disclosed. A resistor is fabricated by first depositing a passivation layer on a semiconductor substrate having multiple transistors previously formed thereon. Next, a first contact window and a second contact window are formed through the first passivation layer at a first contact location and a second contact location, respectively. The first and second contact windows are then filled with metal, such as tungsten, and the metal at the first and second contact windows is planarized to form a first bottom contact and a second bottom contact, respectively. A resistive film, such as polysilicon, subsequently deposited over the first passivation layer. Next, a second passivation layer is formed over the resistive film. Finally, a first top contact and a second top contact are formed to respectively connect the first bottom contact and the second bottom contact to the resistive film.

Title
Method for fabricating resistors within semiconductor integrated circuit devices
Application Number
9/491230
Publication Number
6717233 (B1)
Application Date
January 25, 2000
Publication Date
April 6, 2004
Inventor
Scott Doyle
Centreville
VA, US
Leonard R Rockett
Washington D. C.
WA, US
Jonathan Maimon
Manassas
VA, US
Charles N Alcorn
Centreville
VA, US
Nadim Haddad
Oakton
VA, US
Agent
Bracewell & Patterson L
US
Agent
Antony P Ng
US
Daniel J Long
US
Assignee
BAE Systems Information and Electronic Systems Integration
NH, US
IPC
H01L 29/00
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