06687788 is referenced by 79 patents and cites 20 patents.

A method of caching commands in microprocessors having a plurality of arithmetic units and in modules having a two- or multidimensional cell arrangement is provided. The method includes combining a plurality of cells and arithmetic units to form a plurality of groups, assigning a cache unit to a group, and connecting the cache unit to a higher level unit via a tree structure. The cache unit may send requests for required commands to the higher level cache unit, which may return a command sequence including the required command, if the higher level cache unit holds the first command sequence including the required command in the higher level cache unit's local memory.

Title
Method of hierarchical caching of configuration data having dataflow processors and modules having two-or multidimensional programmable cell structure (FPGAs, DPGAs , etc.)
Application Number
10/191926
Publication Number
6687788 (B2)
Application Date
July 9, 2002
Publication Date
February 3, 2004
Inventor
Robert Münch
Karlsruhe
US
Martin Vorbach
Karlsruhe
US
Agent
Kenyon & Kenyon
US
Assignee
Pact XPP Technologies
US
IPC
G06F 12/00
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