06624079 is referenced by 1 patents.

The method for forming high voltage device combined with a mixed mode process use an un-doped polysilicon layer instead of the conventional polysilicon layer. In the high resistance area, the ion implant is not used until the source region and the drain region are formed. A resistor is formed by etching oxide-nitride-oxide layer and performing ion implant process by using BF

2

radical to the un-doped polysilicon layer to control the resistance. Then multitudes of contact are formed, wherein the high dosage of BF

2

implant would reduce resistance between contacts and resistor.

Title
Method for forming high resistance resistor with integrated high voltage device process
Application Number
9/931953
Publication Number
6624079 (B2)
Application Date
August 20, 2001
Publication Date
September 23, 2003
Inventor
Ching Chun Hwang
Taichung
US
Heng Chun Kao
Taipei
US
Ralph Chen
Taichung
US
Marcus Yang
Chang-Hua
US
Yuan Li Tsai
Taipei
US
Assignee
United Microelectronics
US
IPC
H01L 21/311
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