06587912 is referenced by 302 patents.

A computer system memory module includes a bi-directional repeater hub that in a first direction takes as an input a memory bus signal in a first port, regenerates the memory signals, and outputs the regenerated memory signal at a second port as at least one separate signal for coupling to a memory bus for each of the regenerated separate signals. In a second direction, the bi-directional repeater hub takes as input at least one memory bus signal at the second port, regenerates each input memory bus signal, and outputs the regenerated memory signal at the first port for coupling to a memory bus.

Title
Method and apparatus for implementing multiple memory buses on a memory module
Application Number
9/163860
Publication Number
6587912 (B2)
Application Date
September 30, 1998
Publication Date
July 1, 2003
Inventor
Peter D MacWilliams
Aloha
OR, US
Randy Bonella
Portland
OR, US
Bryce D Horine
Aloha
OR, US
Michael W Leddige
Beaverton
OR, US
Agent
Blakely Sokoloff Taylor & Zafman
US
Assignee
Intel Corporation
CA, US
IPC
G06F 12/00
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