06576926 is referenced by 197 patents and cites 4 patents.

This invention provides a semiconductor device having high operation performance and high reliability. An LDD region

707

overlapping with a gate wiring is arranged in an n-channel TFT

802

forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions

717, 718, 719

and

720

not overlapping with a gate wiring are arranged in an n-channel TFT

804

forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region

707

than in the LDD regions

717, 718, 719

and

720.

Title
Semiconductor device and fabrication method thereof
Application Number
9/510734
Publication Number
6576926 (B1)
Application Date
February 22, 2000
Publication Date
June 10, 2003
Inventor
Hideto Ohnuma
Kanagawa
US
Hidehito Kitakado
Kanagawa
US
Yukio Tanaka
Kanagawa
US
Jun Koyama
Kanagawa
US
Satoshi Murakami
Kanagawa
US
Shunpei Yamazaki
Tokyo
US
Agent
Robinson Intellectual Property Law Office P C
US
Agent
Eric J Robinson
US
Assignee
Semiconductor Energy Laboratory
US
IPC
H01L 21/265
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