06567908 is referenced by 33 patents and cites 2 patents.

An information processing apparatus has a DRAM for storing at least predetermined data, a system bus to which the DRAM is connected, a CPU for controlling the DRAM, and a CPU bus to which the CPU is connected. The information processing apparatus also has an SRAM connected to the system bus and the CPU bus, for storing data transferred from the DRAM, an address counter for generating an address of the SRAM based on an initial value, and a DMA controller for controlling data transfer between the DRAM and the SRAM using the address generated by the address counter. At a certain time, the DMA controller outputs an address D

2

next to an initial address in the DRAM via the system bus to the DRAM, reads data B from the address D

2

, and outputs the data B via the system bus to the SRAM. At the same time, the address counter increments a stored address S

1

into an address S

2

, and outputs the address S

2

to the SRAM, which stores the data B at the address S

2

. Using the address generated on the basis of the initial value, data can efficiently be transferred between the system bus and the CPU bus in synchronism with clock cycles.

Title
Method of and apparatus for processing information, and providing medium
Application Number
9/346673
Publication Number
6567908 (B1)
Application Date
July 2, 1999
Publication Date
May 20, 2003
Inventor
Makoto Furuhashi
Tokyo
US
Agent
Paul A Guss
US
Assignee
Sony Computer Entertainment
US
IPC
G06F 12/00
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