06567839 is referenced by 208 patents and cites 7 patents.

A system and method for performing computer processing operations in a data processing system includes a multithreaded processor and thread switch logic. The multithreaded processor is capable of switching between two or more threads of instructions which can be independently executed. Each thread has a corresponding state in a thread state register depending on its execution status. The thread switch logic contains a thread switch control register to store the conditions upon which a thread switch can occur. Upon the occurrence of a thread switch event, the state and priority of all threads are dynamically interrogated to determine which thread should be the active thread executing the processor. The thread switch logic has a time-out register which forces a thread switch when execution of the active thread in the multithreaded processor exceeds a programmable period of time. Thread switch logic also has a forward progress count register to prevent repetitive unproductive thread switching between threads in the multithreaded processor. Thread switch logic also is responsive to a thread switch manager capable of changing the priority of the different threads and thus superseding thread switch events.

Title
Thread switch control in a multithreaded processor system
Application Number
8/957002
Publication Number
6567839 (B1)
Application Date
October 23, 1997
Publication Date
May 20, 2003
Inventor
Andrew Henry Wottreng
Rochester
MN, US
Sheldon Bernard Levenstein
Rochester
MN, US
William Thomas Flynn
Rochester
MN, US
Richard James Eickemeyer
Rochester
MN, US
John Michael Borkenhagen
Rochester
MN, US
Agent
Karuna Ojanen
US
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 9/00
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