06410371 is referenced by 95 patents.

A method of forming a semiconductor-on-insulator (SOI) wafer. The method includes the steps of providing a first wafer, the first wafer having a silicon substrate and an oxide layer disposed thereon; providing a second wafer, the second wafer having a silicon substrate, the substrate of the second wafer having a silicon-germanium layer disposed thereon, a silicon layer disposed on the silicon-germanium layer and an oxide layer disposed on the silicon layer; wafer bonding the first and second wafers; and removing an undesired portion of the substrate from the second wafer to form an upper silicon layer. The resulting SOI wafer structure is also disclosed.

Title
Method of fabrication of semiconductor-on-insulator (SOI) wafer having a Si/SiGe/Si active layer
Application Number
9/794884
Publication Number
6410371 (B1)
Application Date
February 26, 2001
Publication Date
June 25, 2002
Inventor
Concetta E Riccobene
Mountain View
CA, US
Judy Xilin An
San Jose
CA, US
William G En
Milpitas
CA, US
Bin Yu
Cupertino
CA, US
Agent
Renner Otto Boisselle & Sklar
US
Assignee
Advanced Micro Devices
CA, US
IPC
H01L 21/84
View Original Source