06405273 is referenced by 38 patents.

A data processing unit is disclosed with a register file having a plurality of registers. A memory having a plurality of n-bit input/output ports, and a coupling unit for coupling the memory with the register file, a memory address and select unit for addressing the memory banks are provided. The coupling unit comprises a bus having a bus width of at least 2n-bits forming at least a first and second sub-bus, first couplers for coupling each memory bank or the register file selectively with one of the sub-busses, and second couplers for coupling the register file or the memory banks with the bus.

Title
Data processing device with memory coupling unit
Application Number
9/192170
Publication Number
6405273 (B1)
Application Date
November 13, 1998
Publication Date
June 11, 2002
Inventor
Le Trong Nguyen
Monte Sereno
CA, US
Alfred Eder
Friedberg
US
Gigy Baror
Ramat Gan
US
Klaus Oberlaender
San Jose
CA, US
Rod G Fleck
Mountain View
CA, US
Agent
Fish & Richardson P C
US
Assignee
Infineon Technologies North America
CA, US
IPC
G06F 13/00
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