06357016 is referenced by 64 patents and cites 9 patents.

A method includes maintaining an indication of a pending event with respect to each of a number of threads supported within a multithreaded processor. An indication is also maintained of an active or inactive state for each of the multiple threads. A clock disable condition is detected. This clock disable condition may be indicated by the absence of pending events with respect to each of the multiple threads and an inactive state for each of the multiple threads. A clocks signal, if enabled, is then disabled with respect to at least one functional unit within the multithreaded processor responsive to the detection of the clock disable condition.

Title
Method and apparatus for disabling a clock signal within a multithreaded processor
Application Number
9/458589
Publication Number
6357016 (B1)
Application Date
December 9, 1999
Publication Date
March 12, 2002
Inventor
Aimee Wood
Hillsboro
OR, US
Bret Toll
Hillsboro
OR, US
Dion Rodgers
Hillsboro
OR, US
Agent
Blakely Sokoloff Taylor & Zafman
US
Assignee
Intel Corporation
CA, US
IPC
G06F 1/08
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