06297554 is referenced by 191 patents and cites 11 patents.

An improved structure of a dielectric layer between two adjacent copper wiring lines is disclosed. The dielectric layer is composed of silicon oxide and the adjacent copper wiring lines are formed using a dual damascene process. The structure of the dielectric layer according to the present invention comprises at least one trench in the surface of the dielectric layer, an insulating layer in the trench and at least one void in the insulating layer. The void is used to reduce the effective dielectric constant as well as the parasitic capacitance of the dielectric layer.

Title
Dual damascene interconnect structure with reduced parasitic capacitance
Application Number
9/522931
Publication Number
6297554 (B1)
Application Date
March 10, 2000
Publication Date
October 2, 2001
Inventor
Min Yi Lin
Hsin-Chu
US
Agent
Winston Hsu
US
Assignee
United Microelectronics
US
IPC
H01L 23/48
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