06271469 is referenced by 327 patents and cites 16 patents.

A microelectronic package including a microelectronic die having an active surface and at least one side. An encapsulation material is disposed adjacent the microelectronic die side(s), wherein the encapsulation material includes at least one surface substantially planar to the microelectronic die active surface. A first dielectric material layer may be disposed on at least a portion of the microelectronic die active surface and the encapsulation material surface. At least one conductive trace is then disposed on the first dielectric material layer. The conductive trace(s) is in electrical contact with the microelectronic die active surface. At least one conductive trace extends vertically adjacent the microelectronic die active surface and vertically adjacent the encapsulation material surface.

Title
Direct build-up layer on an encapsulated die package
Application Number
9/438221
Publication Number
6271469 (B1)
Application Date
November 12, 1999
Publication Date
August 7, 2001
Inventor
Harry Fujimoto
Sunnyvale
CA, US
Chun Mu
Saratoga
CA, US
Qing Ma
San Jose
CA, US
Agent
Robert G Winkle
US
Assignee
Intel Corporation
CA, US
IPC
H01L 23/02
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