06246346 is referenced by 118 patents and cites 8 patents.

A storage system employs a method for encoding a sequence of input data blocks into a sequence of codewords. Each input data block includes a first predetermined number of bits (the data block length). Each codeword includes a second predetermined number of bits (the codeword length). The code rate, i.e., the ratio of the first number to the second number, is greater than ¾. The method is performed in a sampled-data channel in a storage system; and the channel includes a circuit the performance of which is adversely affected by an excessive run length of bits between occurrences of a predetermined influential pattern. Preferably, the influential pattern is a two-bit sequence of adjacent 1's, which favorably influences the performance of a timing recovery circuit. The method includes receiving the sequence of input data blocks and generating the sequence of codewords responsive to the received sequence of input data blocks. The sequence of codewords has a constraint on the maximum run length of bits between occurrences of the influential pattern, the maximum run length of bits being less than or equal to the codeword length.

Title
Storage system employing high-rate code with constraint on run length between occurrences of an influential pattern
Application Number
8/957763
Publication Number
6246346 (B1)
Application Date
October 24, 1997
Publication Date
June 12, 2001
Inventor
Steven William McLaughlin
Decatur
GA, US
Patrick James Lee
San Jose
CA, US
Robert Leslie Cloke
Santa Clara
CA, US
Agent
Milad G Shara
US
Assignee
Western Digital Corporation
CA, US
IPC
H03M 5/00
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