06239603 is referenced by 38 patents and cites 10 patents.

Monitor TEGs (Test Element Groups) for extracting the effects of process variations within a semiconductor chip and a test circuit therefor are provided to allow the monitor TEGs to be tested after package sealing. A plurality of monitor TEGs and a control circuit for selectively enabling the monitor TEGs are formed on the same chip as a semiconductor device is formed. The monitor TEGs are placed in selected positions in the chip and selectively monitored via test signals, thereby implementing process parameter monitoring by means of the device parameter variations within the finished chip. The external terminals of the semiconductor device are configured such that they are programmed via enable signals to serve as input/output terminals of the test signals, keeping the number of the external terminals of the semiconductor device from increasing for the testing purpose.

Title
Monitor TEG test circuit
Application Number
9/338436
Publication Number
6239603 (B1)
Application Date
June 23, 1999
Publication Date
May 29, 2001
Inventor
Hiroshi Aoyagi
Kawasaki
US
Toshio Ukei
Yamato
US
Agent
Oblon Spivak McClelland Maier & Neustadt P C
US
Assignee
Kabushiki Kaisha Toshiba
US
IPC
G01R 31/28
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