06233650 is referenced by 154 patents and cites 6 patents.

The present invention discloses a method and apparatus for interfacing a memory array to a memory controller using a field-effect transistor (FET) switch. The memory controller has a bus which comprises a plurality of signal lines. The memory array is coupled to the memory controller. The memory array is divided into N groups of memory devices; each group has K memory devices. K memory devices in each of the N groups share memory signal lines. The FET switch couples the bus to one of the N groups of the shared memory signal lines at different times in response to a switch control indication.

Title
Using FET switches for large memory arrays
Application Number
9/53258
Publication Number
6233650 (B1)
Application Date
April 1, 1998
Publication Date
May 15, 2001
Inventor
Dave Freker
Folsom
CA, US
Brian P Johnson
Folsom
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
US
Assignee
Intel Corporation
CA, US
IPC
G06F 12/00
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