06233599 is referenced by 75 patents and cites 12 patents.

An apparatus and method for performing multithreaded operations includes partitioning the general purpose and/or floating point processor registers into register subsets, including overlapping register subsets, allocating the register subsets to the threads, and managing the register subsets during thread switching. Register overwrite buffers preserve thread resources in overlapping registers during the thread switching process. Thread resources are loaded into the corresponding register subsets or, when overlapping register subsets are employed, into either the corresponding register subset or the corresponding register overwrite buffer. A thread status register is utilized by a thread controller to keep track of READY/NOT-READY threads, the active thread, and whether single-thread or multithread operations are permitted. Furthermore, the registers in the register subsets include a thread identifier field to identify the corresponding thread. Register masks may also be used to identify which registers belong to the various register subsets.

Title
Apparatus and method for retrofitting multi-threaded operations on a computer by partitioning and overlapping registers
Application Number
8/890867
Publication Number
6233599 (B1)
Application Date
July 10, 1997
Publication Date
May 15, 2001
Inventor
John Christopher Willis
Rochester
MN, US
Robert N Newshutz
Rochester
MN, US
George Wayne Nation
Eyota
MN, US
Agent
Karuna Ojanen
US
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 9/00
View Original Source