06230299 is referenced by 229 patents and cites 3 patents.

A data extraction tool is provided to extract filtered connectivity and geometrical data for specified layout cell hierarchies of an integrated circuit (IC) design, e.g. a deep sub-micron IC design. The connectivity and geometrical data for each layout cell hierarchy are extracted at least in part in accordance with specified parasitic effect windows. In one embodiment, the data extraction tool includes a filtered extraction function that operates to extract connectivity and geometrical data for layout nets of each layout cell hierarchy of the IC design, one or more layout nets at a time. Additionally, one or more filtered databases are provided to store the filtered connectivity and geometrical data of the layout cell hierarchies.

Title
Method and apparatus for extracting and storing connectivity and geometrical data for a deep sub-micron integrated circuit design
Application Number
9/52895
Publication Number
6230299 (B1)
Application Date
March 31, 1998
Publication Date
May 8, 2001
Inventor
Paul M Nguyen
Beaverton
OR, US
Robert A Todd
Tigard
OR, US
Richard E Strobel
Vancouver
WA, US
Michael C McSherry
Portland
OR, US
Agent
Columbia IP Law Group
US
Assignee
Mentor Graphics Corporation
OR, US
IPC
G06S 17/50
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