06198172 is referenced by 96 patents and cites 3 patents.

An improved semiconductor chip package capable of independently aligning with testing equipment during the manufacturing phase of electrical testing. Independent alignment is realized by directly connecting the semiconductor chip package to the test alignment apparatus by fitting together two substantially conforming surfaces, one on the chip package and one on the alignment apparatus. The conforming surfaces are arranged so that only one matable position is achievable. The substantially conforming surfaces equate to three substantially conical indentations on the chip package and three substantially conical protrusions or protuberances of substantially conforming size and depth extending from the alignment apparatus. Once fitted, the three protrusions suspend the semiconductor chip in a substantially horizontal plane so that electrical test contacts, also substantially in a horizontal plane, may be easily contacted with the conductive leads extending generally horizontally and co-planar from the semiconductor chip.

Title
Semiconductor chip package
Application Number
9/26584
Publication Number
6198172 (B1)
Application Date
February 20, 1997
Publication Date
March 6, 2001
Inventor
Leland R Nevill
Boise
ID, US
Jerrold L King
Morgan Hill
CA, US
Agent
Workman Nydegger & Seeley
US
Assignee
Micron Technology
ID, US
IPC
H01L 23/544
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