06181163 is referenced by 105 patents and cites 5 patents.

A field-programmable gate array device (FPGA) having plural rows and columns of logic function units (VGB's) further includes a plurality of embedded memory blocks, where each memory block is embedded in a corresponding row of logic function units. Each embedded memory block has an address port for capturing received address signals and a controls port for capturing supplied control signals. Interconnect resources are provided including a Memory Controls-conveying Interconnect Channel (MCIC) for conveying shared address and control signals to plural ones of the memory blocks on a broadcast or narrowcast basis.

Title
FPGA integrated circuit having embedded SRAM memory blocks and interconnect channel for broadcasting address and control signals
Application Number
9/235351
Publication Number
6181163 (B2)
Application Date
January 21, 1999
Publication Date
January 30, 2001
Inventor
Bai Nguyen
San Jose
CA, US
Bradley A Sharpe Geisler
San Jose
CA, US
Herman M Chang
Cupertino
CA, US
Om P Agrawal
Los Altos
CA, US
Agent
Fliesler Dubb Meyer & Lovejoy
US
Assignee
Vantis Corporation
CA, US
IPC
H03K 19/177
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