06150863 is referenced by 44 patents and cites 13 patents.

An input block is provided that includes a user-controlled, variable-delay input circuit. The input circuit is adapted to receive an input signal and to output a delayed version of the input signal on an output node. A number of control signals dictate the amount of delay imposed on the input signal. The control signals, and therefore the amount of delay, are established using a control-signal generator. The generator can be used to actively alter the delay. In one embodiment, the control signal generator is implemented as a feedback circuit that automatically matches the delay period of the delay circuit with the delay period of a distributed clock signal.

Title
User-controlled delay circuit for a programmable logic device
Application Number
9/53879
Publication Number
6150863
Application Date
April 1, 1998
Publication Date
November 21, 2000
Inventor
Peter H Alfke
Los Altos Hills
CA, US
Robert O Conn
Los Gatos
CA, US
Agent
Lois D Cartier
Arthur J Behiel Esq
Assignee
Xilinx
CA, US
IPC
H03H 11/26
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