06148364 is referenced by 115 patents and cites 57 patents.

A method and apparatus for cascading content addressable memory (CAM) devices is disclosed. The method and apparatus may be particularly useful when depth cascading CAM devices that operate in a flow-through mode. In the flow-through mode, a compare instruction may be simultaneously provided to each CAM device in the cascade, and the match address, data stored at the matched location, or other status information may then be output to a common output data bus by the highest priority matching CAM device in the same cycle that the instruction is provided to the CAM devices. Each CAM device may have a cascade input and a cascade output to perform the cascade function. The cascade output of a higher priority CAM device may be connected to the cascade input of the next lower priority CAM device. The higher priority CAM device may assert a cascade signal on its cascade output at a predetermined time after receiving an input signal (e.g., a clock signal). Asserting the cascade signal may indicate that the higher priority CAM device has completed the compare instruction. When the lower priority CAM device detects that the cascade signal has been asserted on its cascade input, the lower priority CAM device may sample the match flag of the higher priority CAM device to determine if the lower priority CAM device may output its data to the common output data bus.

Title
Method and apparatus for cascading content addressable memory devices
Application Number
9/1110
Publication Number
6148364
Application Date
December 30, 1997
Publication Date
November 14, 2000
Inventor
Sandeep Khanna
Santa Clara
CA, US
Bindiganavale S Nataraj
Cupertino
CA, US
Varadarajan Srinivasan
Los Altos Hills
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
NetLogic Microsystems
CA, US
IPC
G06F 12/02
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