06141740 is referenced by 76 patents and cites 51 patents.

A superscalar microprocessor implements a microcode instruction unit that patches existing microcode instructions with substitute microcode instructions. A flag bit is associated with each line of microcode in the microcode instruction unit. If the flag bit is asserted, the microcode instruction unit branches to a patch microcode routine that causes a substitute microcode instruction stored in external RAM to be loaded into patch data registers. The transfer of the substitute microcode instruction to the patch data registers is accomplished using data transfer procedures. The microcode instruction unit then dispatches the substitute instructions stored in the patch data registers and the substitute instruction is executed by a functional unit in place of the existing microcode instruction.

Title
Apparatus and method for microcode patching for generating a next address
Application Number
8/808483
Publication Number
6141740
Application Date
March 3, 1997
Publication Date
October 31, 2000
Inventor
Paul K Miller
Austin
TX, US
Rupaka Mahalingaiah
Austin
TX, US
Agent
Conley Rose & Tayon PC
Agent
Lawrence J Merkel
Assignee
Advanced Micro Devices
CA, US
IPC
G06F 12/06
G06F 12/10
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