06128067 is referenced by 63 patents and cites 13 patents.

An optical-image simulation for a plurality of pattern data of a semiconductor integrated circuit is conducted based on different illuminating conditions, and a pattern bias in each of the illuminating conditions is calculated based on the result of the optical-image simulation. The plurality of pattern data of the semiconductor integrated circuit are CAD data corresponding to patterns of an actual circuit. Evaluation patterns which are produced while changing the illuminating conditions are electrically measured to obtain the pattern bias. A correction value of a mask pattern is obtained from the pattern bias which was obtained by a simulation under the same illuminating condition under which the pattern bias becomes zero. Therefore, it is possible to accurately interrelate the simulation result and an experimental data and thus, it is possible to obtain a correction value of an accurate mask pattern including a lithography margin.

Correcting method and correcting system for mask pattern
Application Number
Publication Number
Application Date
April 28, 1998
Publication Date
October 3, 2000
Koji Hashimoto
Banner & Witcoff
Kabushiki Kaisha Toshiba
G03B 27/32
G03B 27/42
G03B 27/68
View Original Source