06065077 is referenced by 43 patents and cites 36 patents.

The system and method for operating a cache-coherent shared-memory multiprocessing system is disclosed. The system includes a number of devices including processors, a main memory, and I/O devices. Each device is connected by means of a dedicated point-to-point connection or channel to a flow control unit (FCU). The FCU controls the exchange of data between each device in the system by providing a communication path between two devices connected to the FCU. The FCU includes a snoop signal path for processing transactions affecting cacheable memory and a network of signal paths that are used to transfer data between devices. Each signal path can operate concurrently thereby providing the system with the capability of processing multiple data transactions simultaneously.

Title
Apparatus and method for a cache coherent shared memory multiprocessing system
Application Number
8/986430
Publication Number
6065077
Application Date
December 7, 1997
Publication Date
May 16, 2000
Inventor
Daniel D Fu
Sunnyvale
CA, US
Agent
Bennett Smith
Assignee
HotRail
CA, US
IPC
G06F 12/08
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