06058465 is referenced by 128 patents and cites 14 patents.

A vector processor architecture provides vector registers of fixed size having data elements of programmable size and type. The type and size for data elements are defined by instructions which manipulate operands associated with the vector registers. The data size defined by an instruction determines the number of the data elements in a vector register and the number of parallel operations performed to complete the instruction. One embodiment of the invention supports 8-bit, 9-bit, 16-bit, and 32-bit data element sizes of integer type for all sizes and floating point data type for the 32-bit data elements.

Title
Single-instruction-multiple-data processing in a multimedia signal processor
Application Number
8/699597
Publication Number
6058465
Application Date
August 19, 1996
Publication Date
May 2, 2000
Inventor
Le Trong Nguyen
15095 Danielle Pl., Monte Sereno, 95030
CA, US
Agent
Skjerven Morrill MacPherson Franklin & Friel
Agent
David T Millers
IPC
G06F 9/38
G06F 13/20
G06F 9/305
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