06025648 is referenced by 110 patents and cites 20 patents.

A plurality of substrates 1 to which have been flip-chip mounted semiconductor chips 2 are laminated by means of solder bumps 7 provided for the purpose of lamination. A elastic resin is caused to fill the space between the chip upper surface 9 and the substrate 1, thus providing a shock-absorbing material layer 8. By adopting this type of three-dimensional semiconductor modular structure, the shock-absorbing material layer 8 absorbs externally applied vibration and shock, thereby improving the immunity to vibration and shock.

Title
Shock resistant semiconductor device and method for producing same
Application Number
9/61165
Publication Number
6025648
Application Date
April 16, 1998
Publication Date
February 15, 2000
Inventor
Shinichi Miyazaki
Tokyo
JP
Katsumasa Hashimoto
Tokyo
JP
Yoshitaka Kyougoku
Tokyo
JP
Nobuaki Takahashi
Tokyo
JP
Agent
Young & Thompson
Assignee
NEC Corporation
JP
IPC
H01L 23/34
H01L 23/02
H01L 25/10
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