06020629 is referenced by 273 patents and cites 26 patents.

A semiconductor package and a method for fabricating the package are provided. The package includes multiple substrates in a stacked configuration, each having a semiconductor die mounted thereon. Each substrate includes matching patterns of external contacts and contact pads formed on opposing sides of the substrate, and interconnected by interlevel conductors through the substrate. In the package, the external contacts on a first substrate are bonded to the contact pads on an adjacent second substrate, so that all of the dice in the package are interconnected. The fabrication process includes forming multiple substrates on a panel, mounting the dice to the substrates, stacking and bonding the panels to one another, and then separating the substrates from the stacked panels to form the packages.

Title
Stacked semiconductor package and method of fabrication
Application Number
9/92779
Publication Number
6020629
Application Date
June 5, 1998
Publication Date
February 1, 2000
Inventor
Mike Brooks
Caldwell
ID, US
Alan G Wood
Boise
ID, US
Warren M Farnworth
Nampa
ID, US
Agent
Stephen A Gratton
Assignee
Micron Technology
ID, US
IPC
H05K 1/18
H01L 23/50
H01L 23/02
H01L 23/12
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