06001671 is referenced by 434 patents and cites 25 patents.

A method of manufacturing a semiconductor chip package. A sacrificial layer is used as a base to selectively form an array of conductive pads such that a central region is defined by the pads. A back surface of a semiconductor chip is next attached to the sacrificial layer within the central region between the pads so that the contact bearing surface of the chip faces away from the sacrificial layer. The chip contacts are then electrically connected to respective pads, typically by wire bonding a wire therebetween. A curable, dielectric liquid encapsulant is then deposited on the sacrificial layer such that the pads, electrical connections and chip are fully encapsulated, as by an overmolding operation. The encapsulant is then cured and the sacrificial layer is either completely removed or is selectively removed to expose a surface of the pads for electrical attachment to a PWB and the back surface of the chip for creating a direct thermal path from the chip to the PWB.

Title
Methods for manufacturing a semiconductor package having a sacrificial layer
Application Number
8/634464
Publication Number
6001671
Application Date
April 18, 1996
Publication Date
December 14, 1999
Inventor
Joseph Fjelstad
Sunnyvale
CA, US
Agent
Lerner David Littenberg Krumholz & Mentlik
Assignee
Tessera
CA, US
IPC
H01L 21/56
View Original Source