05991202 is referenced by 174 patents and cites 2 patents.

A NAND flash memory system is programmed with minimal program disturb and pass disturb during self-boosting without resorting to impurity implantation for bit line isolation, to p-well biasing or to bit line biasing techniques. A program voltage is applied to a selected word line in the form of a plurality of short pulses while synchronously applying a pulsed pass voltage to the unselected word lines until the selected cell is programmed. The duration of the pulses and the time between pulses are chosen to minimize the program disturb of unselected cells, especially unselected cells on the selected word line, without causing pass disturb of any cell in the array.

Title
Method for reducing program disturb during self-boosting in a NAND flash memory
Application Number
9/161423
Publication Number
5991202
Application Date
September 24, 1998
Publication Date
November 23, 1999
Inventor
Hao Fang
Cupertino
CA, US
Narbeh Derhacobian
Belmont
CA, US
Assignee
Advanced Micro Devices
CA, US
IPC
G11C 11/34
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