05982900 is referenced by 32 patents and cites 10 patents.

In order to avoid large-scale arithmetic circuit and a complicated processing procedure in performing modular arithmetic such as a modular arithmetic exponentiation and modular multiplication in use for encrypting plaintext or the like, the method and apparatus of the present invention for performing the modular arithmetic which executes a first common equation of a modular multiplication arithmetic f(A, B)=A.times.BmodN ("mod" denotes modular arithmetic) to calculate a remainder of a product of an integer A and an integer B divided by an integer N, using a second common equation of Montgomery's replacement arithmetic f(A, B)=A.times.B.times.R'modN corresponding to the first common equation f(A, B)=A.times.BmodN (R' denotes a value to meet the equation R.times.R'modN=1 with respect to R which is an exponent of 2 slightly larger than modulus N), a first replacement arithmetic f.sub.1 '(R.sup.S modN.times.A.sup.T, B.sup.U) (S denotes one of 0, 1, and 2; T denotes one of 0 and 1; and U denotes one of 0 and 1), and a second replacement arithmetic f.sub.2 '{R.sup.2-S modN.times.A.sup.T .times.f.sub.1 '(R.sup.S modN.times.A.sup.T, B.sup.U), R.sup.S modN.times.A.sup.1.multidot.T .times.B.sup.1.multidot.U)} are performed.

Title
Circuit and system for modulo exponentiation arithmetic and arithmetic method of performing modulo exponentiation arithmetic
Application Number
8/833002
Publication Number
5982900
Application Date
April 4, 1997
Publication Date
November 9, 1999
Inventor
Kiyoto Kawazaki
Miyasaki
JP
Hidenori Ebihara
Miyasaki
JP
Agent
Wenderoth Lind & Ponack L
Assignee
Oki Electric
JP
IPC
H04L 9/30
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