05961628 is referenced by 73 patents and cites 4 patents.

An apparatus coupled to a requesting unit and a memory. The apparatus includes a data path and a request control circuit. The data path is coupled to the requesting unit and the memory. The data path is for buffering a vector. The vector includes multiple data elements of a substantially similar data type. The request control circuit is coupled to the data path and the requesting unit. The request control circuit is for receiving a vector memory request from the requesting unit. The request control circuit services the vector memory request by causing the transference of the vector between the requesting unit and the memory via the data path.

Title
Load and store unit for a vector processor
Application Number
8/789575
Publication Number
5961628
Application Date
January 28, 1997
Publication Date
October 5, 1999
Inventor
Seong Rai Cho
Cupertino
CA, US
Heonchul Park
Cupertino
CA, US
Le Trong Nguyen
Monte Sereno
CA, US
Agent
Skjerven Morrill MacPherson Franklin & Friel
Agent
David T Millers
Assignee
Samsung Electronics
KR
IPC
G06F 15/80
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