05940603 is referenced by 48 patents and cites 36 patents.

A memory design is implemented in static memory circuits having a plurality of bidirectional access ports, wherein each port is configured for read or write access. The memory design defines initial contents, depth, width, and bank selection in the memory circuits according to predefined configuration values, as well as, for each access port, whether that access port is configured for read or write. Port access occurs during time slots, which are based on external clock signals and memory circuit access times. Modified memory designs may be implemented such that access ports are accordingly reconfigured.

Title
Method and apparatus for emulating multi-ported memory circuits
Application Number
82051
Publication Number
5940603
Application Date
October 17, 1997
Publication Date
August 17, 1999
Inventor
Thomas B Huang
San Jose
CA, US
Agent
Lyon & Lyon
Assignee
Quickturn Design Systems
CA, US
IPC
G06F 3/00
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