05915167 is referenced by 835 patents and cites 26 patents.

A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 .mu.m in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.

Title
Three dimensional structure memory
Application Number
8/835190
Publication Number
5915167
Application Date
April 4, 1997
Publication Date
June 22, 1999
Inventor
Glenn J Leedy
Jackson
WY, US
Agent
Burns Doane Swecker & Mathis
Assignee
Elm Technology Corporation
MI, US
IPC
H01L 21/50
H01L 21/48
H01L 21/44
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