05912678 is referenced by 115 patents and cites 2 patents.

Methods and processes to reduce the cost and cycle time of designing manufacturing flows are described, particularly for microelectronic integrated circuit processes. One embodiment of the present invention is a method which divides the task of designing process flows into a number of abstraction levels and provides mechanisms to translate between these levels of abstraction. The process is divided into a number of modules each having process constraints. Process constraints are propagated backwards from the final module to the first module, and may also be propagated forward from earlier modules to later modules of needed. This approach results in a top-down design methodology where requirements from higher levels of abstraction are successively reduced to lower abstraction levels, while meeting the constraints imposed by the lower levels.

Title
Process flow design at the module effects level through the use of acceptability regions
Application Number
8/839522
Publication Number
5912678
Application Date
April 14, 1997
Publication Date
June 15, 1999
Inventor
Richard G Burch
McKinney
TX, US
Purnendu K Mozumder
Plano
TX, US
Amy J Unruh
Austin
TX, US
Sharad Saxena
Dallas
TX, US
Agent
Richard L Donaldson
Bret J Petersen
Assignee
Texas Instruments Incorporated
TX, US
IPC
G06F 19/00
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