05900017 is referenced by 37 patents and cites 23 patents.

Bus interface units interposed between a multiple processor bus and individually coupled to the respective processors in a complex incorporating a multitude of processors, where each bus interface unit includes block snoop control registers responsive to signals from a system memory controller including enhanced function supportive of I/O devices with and without block snooping compatibility. The BIU provides functionality for the bus of the multiple processors to be processor independent. This architecture reduces the number of snoop cycles which must access the processor bus, thereby effectively increasing the available processor bus bandwidth. This in turn effectively increases overall system performance.

Title
Snooping a variable number of cache addresses in a multiple processor system by a single snoop request
Application Number
8/856273
Publication Number
5900017
Application Date
May 14, 1997
Publication Date
May 4, 1999
Inventor
Wan L Leung
Raleigh
NC, US
Thomas B Genduso
Apex
NC, US
Agent
Bernard D Bogdon
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 13/00
G06F 12/00
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