05864738 is referenced by 130 patents and cites 71 patents.

A system and method of transferring information between a peripheral device and an MPP system having an interconnect network and a plurality of processing nodes. Each processing element includes a processor, local memory and a router circuit connected to the interconnect network, the processor and the local memory. Each router circuit includes means for transferring data between the processor and the interconnect network and means for transferring data between the local memory and the interconnect network. An I/O controller is connected to a plurality of the router circuits. Data is then read from the peripheral device and transferred through the I/O controller to local memory of one of the processing elements.

Title
Massively parallel processing system using two data paths: one connecting router circuit to the interconnect network and the other connecting router circuit to I/O controller
Application Number
8/614859
Publication Number
5864738
Application Date
March 13, 1996
Publication Date
January 26, 1999
Inventor
Steven L Scott
Eau Claire
WI, US
Steven M Oberlin
Chippewa Falls
WI, US
Richard E Kessler
Eau Claire
WI, US
Agent
Schwegman Lundberg Woessner and Kluth P A
Assignee
Cray Research
MN, US
IPC
G06G 13/00
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