05844836 is referenced by 7 patents and cites 7 patents.

A static random access memory (SRAM) cell having increased cell capacitance at the storage nodes utilizes a capacitive structure. The capacitive structure includes a dielectric material between polysilicon conductive lines and tungsten local interconnects. The polysilicon plates are each connected to drains of lateral transistors associated with the SRAM cell. A dielectric material such as silicon dioxide may be deposited between the local interconnect and polysilicon conductive lines. The capacitor structures are provided between first and second N-channel pull down transistors associated with the SRAM cell.

Title
Memory cell having increased capacitance via a local interconnect to gate capacitor and a method for making such a cell
Application Number
8/822518
Publication Number
5844836
Application Date
March 24, 1997
Publication Date
December 1, 1998
Inventor
Stephen C Horne
Austin
TX, US
Raymond T Lee
Sunnyvale
CA, US
Christopher A Spence
Sunnyvale
CA, US
John C Holst
San Jose
CA, US
Craig S Sander
Mountain View
CA, US
Richard K Klein
Mountain View
CA, US
Asim A Selcuk
Cupertino
CA, US
Nicholas John Kepler
San Jose
CA, US
Agent
Foley & Lardner
Assignee
Advanced Micro Devices
CA, US
IPC
G11C 11/00
View Original Source