05824599 is referenced by 305 patents and cites 9 patents.

A method for utilizing electroless copper deposition to form interconnects on a semiconductor. Once a via or a trench is formed in a dielectric layer, a titanium nitride (TiN) or tantalum (Ta) barrier layer is deposited. Then, a catalytic copper seed layer is conformally blanket deposited in vacuum over the barrier layer. Next, without breaking the vacuum, an aluminum protective layer is deposited onto the catalytic layer to encapsulate and protect the catalytic layer from oxidizing. An electroless deposition technique is then used to auto-catalytically deposit copper on the catalytic layer. The electroless deposition solution dissolves the overlying protective layer to expose the surface of the underlying catalytic layer. The electroless copper deposition occurs on this catalytic surface, and continues until the via/trench is filled. Subsequently, the copper and barrier material are polished by an application of chemical-mechanical polishing (CMP) to remove excess copper and barrier material from the surface, so that the only copper and barrier material remaining are in the via/trench openings. Then an overlying silicon nitride (SiN) layer is formed above the exposed copper in order to form a dielectric barrier layer. The copper interconnect is fully encapsulated from the adjacent material by the TiN (or Ta) barrier layer and the overlying SiN layer.

Title
Protected encapsulation of catalytic layer for electroless copper interconnect
Application Number
8/587264
Publication Number
5824599
Application Date
January 16, 1996
Publication Date
October 20, 1998
Inventor
Melvin Desilva
Dallas
TX, US
Prahalad K Vasudev
Austin
TX, US
Bin Zhao
Austin
TX, US
Chiu H Ting
Saratoga
CA, US
Valery M Dubin
Cupertino
CA, US
Yosef Schacham Diamand
Ithaca
NY, US
Assignee
Sematech
TX, US
Intel Corporation
CA, US
Cornell Research Foundation
NY, US
IPC
H01L 21/44
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