05821169 is referenced by 49 patents and cites 9 patents.

A method is provided for forming intermediate levels in an integrated circuit dielectric during a damascene process using a hard mask layer to transfer the pattern of a photoresist mask having at least one intermediate thickness. The dielectric is covered with a hard mask layer, and the hard mask layer is covered with the photoresist mask. The photoresist mask pattern is transferred into the hard mask pattern so that the hard mask pattern has at least one intermediate thickness. The method forms an interconnect to a first depth in the dielectric through an opening in the hard mask pattern. The hard mask pattern is partially etched away in the area of the intermediate thickness to reveal a second dielectric surface area. The second dielectric surface area is etched to a second depth, less than the first depth. In this manner, vias can be formed to the first depth, and lines can be formed at a second depth to intersect the vias. The use of a relatively thin hard mask pattern reduces the degradation of vertical surface features, due to faceting, which generally occurs with the use of a thicker photoresist pattern. The method of the present invention allows a multi-level damascene process to be used to form features with relatively small geometries in the dielectric.

Title
Hard mask method for transferring a multi-level photoresist pattern
Application Number
8/692379
Publication Number
5821169
Application Date
August 5, 1996
Publication Date
October 13, 1998
Inventor
Bruce Dale Ulrich
Beaverton
OR, US
Chien Hsiung Peng
Vancouver
WA, US
Tue Nguyen
Vancouver
WA, US
Agent
David C Ripma
Gerald Maliszewski
Assignee
Sharp Kabushiki Kaisha
JP
Sharp Microelectronics Technology
WA, US
IPC
B44C 1/22
H01L 21/00
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