05802048 is referenced by 66 patents and cites 8 patents.

Methods and circuitry for arbitrating for control of a serial bus are described. According to one embodiment, one or more nodes of a serial bus are provided with a mechanism for discriminating between data packets and acknowledge packets. If a packet transmitted, repeated, or received by the node is a data packet, the node remains idle for a subaction gap time T.sub.sa to better ensure that the expected acknowledge packet is allowed to successfully propagate throughout the serial bus to the source node. If the packet transmitted by the node is an acknowledge packet, the node is free to begin the arbitration phase of the next subaction if there are no other conditions that prevent further arbitration by that node. To discriminate between data packets and acknowledge packets, a counter is used to determine the length of a transmitted packet, and the length is compared to the expected length of an acknowledge packet. If the length is equal to the expected length of an acknowledge packet, the packet is an acknowledge packet.

Title
Method and apparatus for accelerating arbitration in a serial bus by detection of acknowledge packets
Application Number
316552
Publication Number
5802048
Application Date
August 1, 1996
Publication Date
September 1, 1998
Inventor
William S Duckwall
Santa Cruz
CA, US
Agent
Blakely Sokoloff Taylor & Zafman
Assignee
Apple Computer
CA, US
IPC
H04J 3/26
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