05793822 is referenced by 48 patents and cites 8 patents.

A circuit in a semiconductor device for testing jitter tolerance of a receiver in the semiconductor device. The circuit includes a jitter injection circuit that has an output connected to an input in a phase-locked loop circuit. The jitter injection circuit generates an output signal in response to an application of an input signal. The phase-locked loop circuit has an output that generates a clock signal, wherein the clock signal may be altered by the output signal from the jitter injection circuit. The clock signal from the phase-locked loop circuit controls transmission of data at the transmitter. Alteration of the clock signal caused by the jitter injection circuit alters the manner in which the transmitter transmits data.

Title
Bist jitter tolerance measurement technique
Application Number
8/543767
Publication Number
5793822
Application Date
October 16, 1995
Publication Date
August 11, 1998
Inventor
Philip A Atkinson
Colorado Springs
CO, US
Michael B Anderson
Colorado Springs
CO, US
Agent
Wayne P Bailey
Duke W Yee
Assignee
Symbios
CO, US
IPC
H04L 7/00
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