05778419 is referenced by 245 patents and cites 6 patents.

A memory chip for storage and retrieval of data transmitted as streams of data at sustained peak data transfer rates. The memory chip includes a memory device and an interface capable of achieving high bandwidth throughput. The memory device decodes, arbitrates between, and executes memory access commands, and generates memory access responses. The interface includes a data path, and a number of memory controllers. The interface receives and transmits input and output data streams, and the memory controllers control the flow of the input and output data streams within the memory chip. A packet buffer is coupled between the data path and the memory device. The packet buffer provides for temporary storage of memory access commands, response information, and forwarding data.

Title
DRAM with high bandwidth interface that uses packets and arbitration
Application Number
516036
Publication Number
5778419
Application Date
February 23, 1996
Publication Date
July 7, 1998
Inventor
Alan G Corry
Santa Clara
CA, US
Timothy B Robinson
Boulder Creek
CA, US
Craig C Hansen
Los Altos
CA, US
Agent
McDermott Will & Emery
Assignee
Microunity Systems Engineering
CA, US
IPC
G06F 12/00
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