05761721 is referenced by 42 patents and cites 17 patents.

A method and system for providing cache coherence despite unordered interconnect transport. In a computer system of multiple memory devices or memory units having shared memory and an interconnect characterized by unordered transport, the method comprises sending a request packet over the interconnect from a first memory device to a second memory device requiring that an action be carried out on shared memory held by the second memory device. If the second memory device determines that the shared memory is in a transient state, the second memory device returns the request packet to the first memory device; otherwise, the request is carried out by the second memory device. The first memory device will continue to resend the request packet each time that the request packet is returned.

Title
Method and system for cache coherence despite unordered interconnect transport
Application Number
174648
Publication Number
5761721
Application Date
July 11, 1996
Publication Date
June 2, 1998
Inventor
Frederick Jacob Ziegler
Rochester
MN, US
John Christopher Willis
Rochester
MN, US
Russell Dean Hoover
Rochester
MN, US
Nancy Joan Duffield
Rochester
MN, US
Donald Francis Baldus
Mazeppa
MN, US
Agent
Andrew J Dillon
Assignee
International Business Machines Corporation
NY, US
IPC
G06F 12/00
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